:A22i - the nocash z80 and nintendo gameboy assembler
-----------------------------------------------------

:Contents
---------
History
Directives, Numeric Formats, Arithmetics
DOS Syntax, DOS Errorlevel
Z80 Instruction Set
Nintendo Gameboy Instruction Set
Copyright/Contact/Updates

:History
--------
First A22 was programmed 1993 in turbo pascal to assemble code for the gameboy
(the peepshow (bad idea, but there should be no others on the machine) and the
infocom text adventure interpreter). It was also used to assemble some rom
changes and an early xed-editor for the cpc homecomputer. The pascal version
was boring slow. The most used one took about 30 seconds for 4000 lines source
code. The newest version was tuned to 6 seconds.
  Then I programmed no$cpc (nocash cpc emulator). I included an assembler based
online assembler. In march 97 I added labels and built an included source-code
assembler. To be complete I added the gameboy instructions to a22i. Next day I
excluded the pure assembler from no$cpc to a22i.com.
  The com-file is sized 6K and the time per 4000 lines should be one second. Ha!
Anyway the pascal version might interest people using something else than dos.
(Timings performed on 386-33)
  Filename-history starts with ASS like assembler, turned into AZZ for Z80,
then changed into A22 for version two. Finally the "i" was appended.
  When de gameboy emulator (no$gmb) was programmed, a22i was included and
optimized yet again.

:Directives, Numeric Formats, Arithmetics
-----------------------------------------

Assembler Directives
--------------------
org  adr     assume following code from this address on
load adr     alternate load address (for .cpc/.msx, default is first org adr)
.z80         use z80 instruction set
.8080        use z80 instruction set, but allow only 8080/8085 compatible code
.gmb         use nintendo gameboy command set
.fix         fix gameboy header checksum at (014Dh)
.msx         generate msx binfile header
.cpc         generate cpc binfile header
.cpr         generate cpc-plus cartridge (currently max 16KBytes)
.mem         load & autostart resulting binary (if assembled from emulator)
.norewrite   do not delete existing output file (keep following data in file)
.ram         following defines RAM data structure (assembled to nowhere)
.rom         following is normal code (past .ram) (assembled to ROM image)
db   x,[y..] list of data bytes
defb x,[y..] list of data bytes
dw   x,[y..] list of data words (a22i supports bytewise strings within dw/defw)
defw x,[y..] list of data words (such as dw 'Hello',1234h)
defs n       n bytes space (filled with zeros)
deff n       n bytes space (filled with FFs - useful for eproms)
l equ n      l=n
l:   [cmd]   l=$   (global label)
@@l: [cmd]   @@l=$ (local label, all locals are reset at next global label)
end  [adr]   end of source code, optional auto start adr (for .cpc)

Numeric Formats
---------------
A22i recognizes several numeric formats:
  Decimal       85 (example)
  Hexadecimal   55h
  Ascii         'U'
  Binary        01010101b
  Optical       

To avoid confusion with labels and registers, hexadecimal values must
begin with a leading decimal digit (ie. E000h must be written as 0E000h).
Ascii values may be a single character or a data string like 'hello!'.

The 'optical numeric format' uses dithered charcters from the DOS font,
  chr(176)    "0"
  chr(177)    "1"
  chr(178)    "2"
  chr(219)    "3"
Low bits of each 'digit' are put into the lower byte of the resulting value,
high bits to the upper byte. The main purpose is to define gameboy 8x8
pixel 4-color sprites in 'dw' lines, for example, here's a smiley...
  dw    ;db 00111100b,00000000b
  dw    ;db 01111110b,00000000b  now say, which looks easier to read,
  dw ۱۱   ;db 11111111b,00100010b  dithered values or the equivalent
  dw    ;db 11110111b,00001000b  binaries?
  dw ۱   ;db 11111111b,01000000b  the nocash XKEY keyboard driver
  dw ۱   ;db 11111111b,00111100b  supports comfortable key-combinations
  dw    ;db 01111110b,00000000b  for entering dithered characters.
  dw    ;db 00111100b,00000000b
By using only  and  it can also be used to define 2-color sprites via 'db'.


Arithmetics
-----------
Meanwhile, A22i supports following aritmetic operands:
  +  -  *  /
Except for "+" and "-", aritmetics may NOT contain forward references to
labels defined later in the code.
Please use the usual priority ordering on arithetic operands, ie. write
"xx*xx + xx" instead "xx + xx*xx", A22i cannot do this on it's own! :-)
If you mess up above ordering, you will get an error message.

:DOS Syntax, DOS Errorlevel
---------------------------
A22i <filename> | /?
If filename is not found we will also look for it with appended extensions
ASM, A22, AZM and ZEN.

After execution DOS errorlevel is set as follows:
 00  no errors
 01  assembly failure(s)
 02  fatal (file opening, etc)

:Z80 Instruction Set
--------------------

Register/Flag Set
-----------------

16bit Hi   Lo   Name/Function             bit name name                 set clr
---------------------------------------   -------------------------------------
AF    A    -    Accumulator & Flags       0   C    Carry Flag           C   NC
BC    B    C    BC                        1   N    Add/Sub-Flag (BCD)   -   -
DE    D    E    DE                        2   P/V  Parity/Overflow-Flag PE  PO
HL    H    L    HL                        3   -    -                    -   -
IX    IXH  IXL  Indexed HL register 1     4   H    Half-Carry-Flg (BCD) -   -
IY    IYH  IYL  Indexed HL register 2     5   -    -                    -   -
SP    -    -    Stack Pointer             6   Z    Zero-Flag            Z   NZ
PC    -    -    Program Counter/Pointer   7   S    Sign-Flag            M   P
-     I    R    Interrupt & Refresh

The Accumulator (A) is the allround register for 8bit operations. Registers
B, C, D, E, H, L are normal 8 bit registers, which can also be accessed as BC,
DE, HL.
  B and BC are sometimes used as counters. DE is used as DEstination pointer
in block transfer commands. Finally HL is the allround register for 16bit
operations.
  IX and IY are able to manage almost all the things that HL is able to do.
And when used as memory pointers they are tuned by an 8bit integer index
(IX+d). The disadvantages are that they fetch more memory and cycles than HL.
  The lower 7 bits of the Refresh Register (R) are incremented with every
instruction. Instructions with at least one prefix-byte (CB,DD,ED,FD) will
increment the register twice. Bit 7 can be used by programmer to store data,
some people did so.
  The Interrupt Register is used in interrupt mode 2 (see command "im 2") only.
In other modes it should be possible to use it as simple 8bit data register,
but I've never seen that yet.
  IXH, IXL, IYH, IYL are undocumented 8 bit registers which can be used to
access hi- and low-byte of IX and IY (as H and L can do with HL). They are
not documented in the following instruction set tables. However they support
some - but not all - instructions supported by registers H and L.

Following tables consist of
  1. commandname [parameters]
  2. opcode(s) 0..3
  3. t-cycles
  4. affected flags
  5. brief description

Z80 8bit-Loadcommands
---------------------
ld   r,r       xx           4 ------ r=r
ld   r,n       xx nn        7 ------ r=n
ld   r,(HL)    xx           7 ------ r=(HL)
ld   r,(IX+d)  DD xx dd    19 ------ r=(IX+d)
ld   r,(IY+d)  FD xx dd    19 ------ r=(IY+d)
ld   (HL),r    7x           7 ------ (HL)=r
ld   (IX+d),r  DD 7x dd    19 ------
ld   (IY+d),r  FD 7x dd    19 ------
ld   (HL),n    36 nn       10 ------
ld   (IX+d),n  DD 36 dd nn 19 ------
ld   (IY+d),n  FD 36 dd nn 19 ------
ld   A,(BC)    0A           7 ------
ld   A,(DE)    1A           7 ------
ld   A,(nn)    3A          13 ------
ld   (BC),A    02           7 ------
ld   (DE),A    12           7 ------
ld   (nn),A    32          13 ------
ld   A,I       ED 57        9 sz0i0-
ld   A,R       ED 5F        9 sz0i0-
ld   I,A       ED 47        9 ------
ld   R,A       ED 4F        9 ------

Z80 16bit-Loadcommands
----------------------
ld   rr,nn     x1 nn nn    10 ------ rr=nn (rr may be BC,DE,HL or SP)
ld   IX,nn     DD 21 nn nn 13 ------ IX=nn
ld   IY,nn     FD 21 nn nn 13 ------ IY=nn
ld   HL,(nn)   2A nn nn    16 ------ HL=(nn)
ld   IX,(nn)   DD 2A nn nn 20 ------ IX=(nn)
ld   IY,(nn)   FD 2A nn nn 20 ------ IY=(nn)
ld   rr,(nn)   ED xB nn nn 20 ------ rr=(nn) (rr may be BC,DE,HL or SP)
ld   (nn),HL   22 nn nn    16 ------ (nn)=HL
ld   (nn),IX   DD 22 nn nn 20 ------ (nn)=IX
ld   (nn),IY   FD 22 nn nn 20 ------ (nn)=IY
ld   (nn),rr   ED x3 nn nn 20 ------ (nn)=rr (rr may be BC,DE,HL or SP)
ld   SP,HL     F9           6 ------ SP=HL
ld   SP,IX     DD F9       10 ------ SP=IX
ld   SP,IY     FD F9       10 ------ SP=IY
push rr        x5          11 ------ SP=SP-2  (SP)=rr   (rr may be BC,DE,HL,AF)
push IX        DD E5       15 ------ SP=SP-2  (SP)=IX
push IY        FD E5       15 ------ SP=SP-2  (SP)=IY
pop  rr        x1          10 (-AF-) rr=(SP)  SP=SP+2   (rr may be BC,DE,HL,AF)
pop  IX        DD E1       14 ------ IX=(SP)  SP=SP+2
pop  IY        FD E1       14 ------ IY=(SP)  SP=SP+2
ex   DE,HL     EB           4 ------ exchange DE <--> HL
ex   AF,AF     08           4 xxxxxx exchange AF <--> AF'
exx            D9           4 ------ exchange BC,DE,HL <--> BC',DE',HL'
ex   (SP),HL   E3          19 ------ exchange (SP) <--> HL
ex   (SP),IX   DD E3       23 ------ exchange (SP) <--> IX
ex   (SP),IY   FD E3       23 ------ exchange (SP) <--> IY

Z80 Blocktransfer- und Searchcommands
-------------------------------------
ldi            ED A0       16 --0z0- (DE)=(HL), HL=HL+1, DE=DE+1, BC=BC-1
ldd            ED A8       16 --0z0- (DE)=(HL), HL=HL-1, DE=DE-1, BC=BC-1
cpi            ED A1       16 szhz1- A-(HL), HL=HL+1, DE=DE+1, BC=BC-1
cpd            ED A9       16 szhz1- A-(HL), HL=HL-1, DE=DE-1, BC=BC-1
ldir           ED B0       21 --0?0- ldi-repeat until BC=0
lddr           ED B8       21 --0?0- ldd-repeat until BC=0
cpir           ED B1       21 szhz1- cpi-repeat until BC=0 or compare fits
cpdr           ED B9       21 szhz1- cpd-repeat until BC=0 or compare fits

Z80 8bit-Arithmetic/logical Commands
------------------------------------
add  A,r       8x           4 szho0c A=A+r
add  A,n       C6 nn        7 szho0c A=A+n
add  A,(HL)    86           7 szho0c A=A+(HL)
add  A,(IX+d)  DD 86       19 szho0c A=A+(IX+d)
add  A,(IY+d)  FD 86       19 szho0c A=A+(IY+d)
adc  A,r       8x           4 szho0c A=A+r+cy
adc  A,n       CE nn        7 szho0c A=A+n+cy
adc  A,(HL)    8E           7 szho0c A=A+(HL)+cy
adc  A,(IX+d)  DD 8E       19 szho0c A=A+(IX+d)+cy
adc  A,(IY+d)  FD 8E       19 szho0c A=A+(IY+d)+cy
sub  r         9x           4 szho1c A=A-r
sub  n         D6 nn        7 szho1c A=A-n
sub  (HL)      96           7 szho1c A=A-(HL)
sub  (IX+d)    DD 96       19 szho1c A=A-(IX+d)
sub  (IY+d)    FD 96       19 szho1c A=A-(IY+d)
sbc  A,r       9x           4 szho1c A=A-r-cy
sbc  A,n       DE nn        7 szho1c A=A-n-cy
sbc  A,(HL)    9E           7 szho1c A=A-(HL)-cy
sbc  A,(IX+d)  DD 9E       19 szho1c A=A-(IX+d)-cy
sbc  A,(IY+d)  FD 9E       19 szho1c A=A-(IY+d)-cy
and  r         Ax           4 sz1p00 A=A & r
and  n         E6 nn        7 sz1p00 A=A & n
and  (HL)      A6           7 sz1p00 A=A & (HL)
and  (IX+d)    DD A6       19 sz1p00 A=A & (IX+d)
and  (IY+d)    FD A6       19 sz1p00 A=A & (IY+d)
xor  r         Ax           4 sz1p00
xor  n         EE nn        7 sz1p00
xor  (HL)      AE           7 sz1p00
xor  (IX+d)    DD AE       19 sz1p00
xor  (IY+d)    FD AE       19 sz1p00
or   r         Bx           4 sz1p00 A=A | r
or   n         F6 nn        7 sz1p00 A=A | n
or   (HL)      B6           7 sz1p00 A=A | (HL)
or   (IX+d)    DD B6       19 sz1p00 A=A | (IX+d)
or   (IY+d)    FD B6       19 sz1p00 A=A | (IY+d)
cp   r         Bx           4 szho1c compare A-r
cp   n         FE nn        7 szho1c compare A-n
cp   (HL)      BE           7 szho1c compare A-(HL)
cp   (IX+d)    DD BE       19 szho1c compare A-(IX+d)
cp   (IY+d)    FD BE       19 szho1c compare A-(IY+d)
inc  r         xx           4 szho0- r=r+1
inc  (HL)      34          11 szho0- (HL)=(HL)+1
inc  (IX+d)    DD 34 dd    23 szho0- (IX+d)=(IX+d)+1
inc  (IY+d)    FD 34 dd    23 szho0- (IY+d)=(IY+d)+1
dec  r         xx           4 szho1- r=r-1
dec  (HL)      35          11 szho1- (HL)=(HL)-1
dec  (IX+d)    DD 35 dd    23 szho1- (IX+d)=(IX+d)-1
dec  (IY+d)    FD 35 dd    23 szho1- (IY+d)=(IY+d)-1
daa            27           4 szxp-x decimal adjust akku
cpl            2F           4 --1-1- A = A xor FF
neg            ED 44        8 szho1c A = 0-A

Z80 16bit-Arithmetic/logical Commands
-------------------------------------
add  HL,rr     x9          11 --h-0c HL = HL+rr    ; rr may be BC,DE,HL,SP
add  IX,rr     DD x9       15 --h-0c IX = IX+rr    ; rr may be BC,DE,IX,SP
add  IY,rr     FD x9       15 --h-0c IY = IY+rr    ; rr may be BC,DE,IY,SP
adc  HL,rr     ED xA       15 szho0c HL = HL+rr+cy ; rr may be BC,DE,HL,SP
sbc  HL,rr     ED x2       15 szho1c HL = HL-rr-cy ; rr may be BC,DE,HL,SP
inc  rr        x3           6 ------ rr = rr+1     ;rr may be BC,DE,HL,SP
inc  IX        DD 23       10 ------ IX = IX+1
inc  IY        FD 23       10 ------ IY = IY+1
dec  rr        xB           6 ------ rr = rr-1     ;rr may be BC,DE,HL,SP
dec  IX        DD 2B       10 ------ IX = IX-1
dec  IY        FD 2B       10 ------ IY = IY-1

Z80 Rotate- und Shift-Commands
------------------------------
rlca           07           4 --0-0c rotate akku left
rla            17           4 --0-0c rotate akku left through carry
rrca           0F           4 --0-0c rotate akku right
rra            1F           4 --0-0c rotate akku right through carry
rlc  r         CB 0x        8 sz0p0c rotate left
rlc  (HL)      CB 06       15 sz0p0c
rlc  (IX+d)    DD CB dd 06 23 sz0p0c
rlc  (IY+d)    FD CB dd 06 23 sz0p0c
rl   r         CB 1x        8 sz0p0c rotate left through carry
rl   (HL)      CB 16       15 sz0p0c
rl   (IX+d)    DD CB dd 16 23 sz0p0c
rl   (IY+d)    FD CB dd 16 23 sz0p0c
rrc  r         CB 0x        8 sz0p0c rotate right
rrc  (HL)      CB 0E       15 sz0p0c
rrc  (IX+d)    DD CB dd 0E 23 sz0p0c
rrc  (IY+d)    FD CB dd 0E 23 sz0p0c
rr   r         CB 1x        8 sz0p0c rotate right through carry
rr   (HL)      CB 1E       15 sz0p0c
rr   (IX+d)    DD CB dd 1E 23 sz0p0c
rr   (IY+d)    FD CB dd 1E 23 sz0p0c
sla  r         CB 2x        8 sz0p0c shift left arithmetic (b0=0)
sla  (HL)      CB 26       15 sz0p0c
sla  (IX+d)    DD CB dd 26 23 sz0p0c
sla  (IY+d)    FD CB dd 26 23 sz0p0c
sll  r         CB 3x        8 s00p0c undocumented shift left (b0=1)
sll  (HL)      CB 36       15 s00p0c
sll  (IX+d)    DD CB dd 36 23 s00p0c
sll  (IY+d)    FD CB dd 36 23 s00p0c
sra  r         CB 2x        8 sz0p0c shift right arithmetic (b7=b7)
sra  (HL)      CB 2E       15 sz0p0c
sra  (IX+d)    DD CB dd 2E 23 sz0p0c
sra  (IY+d)    FD CB dd 2E 23 sz0p0c
srl  r         CB 3x        8 sz0p0c shift right logical (b7=0)
srl  (HL)      CB 3E       15 sz0p0c
srl  (IX+d)    DD CB dd 3E 23 sz0p0c
srl  (IY+d)    FD CB dd 3E 23 sz0p0c
rld            ED 6F       18 sz0p0- rotate left low digit of akku through (hl)
rrd            ED 67       18 sz0p0- rotate right low digit of akku through (hl)

Z80 Singlebit Operation Commands
--------------------------------
bit  n,r       CB xx        8 xz1x0- test bit n
bit  n,(HL)    CB xx       12 xz1x0-
bit  n,(IX+d)  DD CB dd xx 20 xz1x0-
bit  n,(IY+d)  FD CB dd xx 20 xz1x0-
set  n,r       CB xx        8 ------ set bit n
set  n,(HL)    CB xx       15 ------
set  n,(IX+d)  DD CB dd xx 23 ------
set  n,(IY+d)  FD CB dd xx 23 ------
res  n,r       CB xx        8 ------ reset bit n
res  n,(HL)    CB xx       15 ------
res  n,(IX+d)  DD CB dd xx 23 ------
res  n,(IY+d)  FD CB dd xx 23 ------

Z80 CPU-Controlcommands
-----------------------
ccf            3F           4 --h-0c cy=cy xor 1
scf            37           4 --0-01 cy=1
nop            00           4 ------ no operation
halt           76           4 ------ repeat until interrupt occurs
di             F3           4 ------ disable interrupts
ei             FB           4 ------ enable interrupts
im   0         ED 46        8 ------ read opcode from databus on interrupt
im   1         ED 56        8 ------ execute rst 7 (call 0038h) on interrupt
im   2         ED 5E        8 ------ execute call (i*100h+databus) on interrupt

Z80 Jumpcommands
----------------
jp   nn        C3 nn nn    19 ------ PC=nn
jp   (HL)      E9           4 ------ jump to HL, *not* to (HL), stupid syntax
jp   (IX)      DD E9        8 ------ jump to IX, *not* to (IX), stupid syntax
jp   (IY)      FD E9        8 ------ jump to IY, *not* to (IY), stupid syntax
jp   f,nn      xx nn nn 10;10 ------ jump if flg (not)set (nz,z,nc,c,po,pe,p,m)
jr   PC+dd     18 dd       12 ------ relative jump to nn
jr   f,PC+dd   xx dd     12;7 ------ rel.jump to nn if flag (not)set (nz,z,nc,c)
djnz nn        10 dd     13;8 ------ decrement B and relative jump to nn if B<>0
call nn        CD nn nn    17 ------ SP=SP-2, (SP)=PC, PC=nn
call f,nn      xx nn nn 17;10 ------ call if flag (not)set (nz,z,nc,c,po,pe,p,m)
ret            C9          10 ------ PC=(SP), SP=SP+2
ret  f         xx        11;5 ------ pop PC if nz,z,nc,c,po,pe,p,m
reti           ED 4D       14 ------ pop PC
retn           ED 45       14 ------ pop PC
rst  n         xx          11 ------ call n*8 (n=0..7)

Z80 I/O-Commands
----------------
in   A,(n)     DB nn       11 ------ read from io-port A*100h+n
in   r,(C)     ED xx       12 sz0p0- read from io-port BC
out  (n),A     D3 nn       11 ------ write to io-port A*100h+n
out  (C),r     ED xx       12 ------ write to io-port BC
ini            ED A2       16 xzxx1- (HL)=ioport(BC), HL=HL+1, B=B-1
ind            ED AA       16 xzxx1- (HL)=ioport(BC), HL=HL-1, B=B-1
inir           ED B2       21 x1xx1- same than ini, repeat until b=0
indr           ED BA       21 x1xx1- same than ind, repeat until b=0
outi           ED A3       16 xzxx1- B=B-1, ioport(BC)=(HL), HL=HL+1
outd           ED AB       16 xzxx1- B=B-1, ioport(BC)=(HL), HL=HL-1
otir           ED B3       21 x1xx1- same than outi, repeat until b=0
otdr           ED BB       21 x1xx1- same than outd, repeat until b=0

Offical/Senseful Syntax
-----------------------
A22i supports both official and senseful syntax.
official:   jp (rr)  rst 0..7    in r,(c)   out (c),r   add a,x    sub x
senseful:   jp rr    rst 0..7*8  in r,(bc)  out (bc),r  add [a,]x  sub [a,]x

Commands 'add,adc,sub,sbc,cp,and,or,xor' support lazy-syntax, that means de
leading 'a' is free. (Offical confusing syntax sometimes insists on leading
'a', sometimes on not-leading 'a'.)

Another stupid thing is that the rotate commands with 'c' in their names (rlc)
do not rotate through carry. Those without 'c' (rl) do rotate through cy!
Anyway, exchanging the command names for senseful syntax would make the mess
complete, so the rotate commands stay as stupid as they are...

:Nintendo Gameboy Instruction Set
-------------------------------------
The gameboy assembler mode is enabled by source code directive ".gmb".
The instruction set is z80-based but there are some differences:
Prefix-commands dd/ed/fd are missing. That means no ix-, iy-registers, no
block commands and some other missing commands. Prefix-cb commands still
exist (except illegal sll).
The sign and parity/overflow flags have been removed.
Some commands are remapped.
Some commands were added.

Opcode  Z80             GMB
---------------------------------------
08      EX AF,AF        LD   (nn),SP
10      DJNZ PC+dd      STOP
22      LD (nn),HL      LDI  (HL),A
2A      LD HL,(nn)      LDI  A,(HL)
32      LD (nn),A       LDD  (HL),A
3A      LD A,(nn)       LDD  A,(HL)
D3      OUT (n),A       -
D9      EXX             RETI
DB      IN  A,(n)       -
DD      <IX>            -
E0      RET PO          OUT  (n),A
E2      JP PO,nn        OUT  (C),A
E3      EX   (SP),HL    -
E4      CALL P0,nn      -
E8      RET  PE         ADD  SP,dd
EA      JP   PE,nn      LD   (nn),A
EB      EX   DE,HL      -
EC      CALL PE,nn      -
ED      <pref>          -
F0      RET P           IN   A,(n)
F2      JP P,nn         IN   A,(C)
F4      CALL P,nn       -
F8      RET M           LD   HL,SP+dd
FA      JP M,nn         LD   A,(nn)
FC      CALL M,nn       -
FD      <IY>            -
CB3X    SLL r/(HL)      SWAP r/(HL)

16bit Hi   Lo   Name/Function             bit name name                 set clr
---------------------------------------   -------------------------------------
AF    A    -    Accumulator & Flags       7   Z    Zero-Flag            Z   NZ
BC    B    C    BC                        6   N    Add/Sub-Flag (BCD)   -   -
DE    D    E    DE                        5   H    Half-Carry-Flg (BCD) -   -
HL    H    L    HL                        4   C    Carry Flag           C   NC
SP    -    -    Stack Pointer               the lower 4 bits of the flag
PC    -    -    Program Counter/Pointer     register are always zero-filled.

The timings below assume a CPU clock frequency of 4.194304 MHz (or 8.4
MHz for CGB in double speed mode), as all gameboy timings are divideable
by 4, many people specify timings and clock frequency divided by 4.

GMB 8bit-Loadcommands
---------------------
ld   r,r       xx           4 ---- r=r
ld   r,n       xx nn        8 ---- r=n
ld   r,(HL)    xx           8 ---- r=(HL)
ld   (HL),r    7x           8 ---- (HL)=r
ld   (HL),n    36 nn       12 ----
ld   A,(BC)    0A           8 ----
ld   A,(DE)    1A           8 ----
ld   A,(nn)    FA          16 ----
ld   (BC),A    02           8 ----
ld   (DE),A    12           8 ----
ld   (nn),A    EA          16 ----
ldi  (HL),A    22           8 ---- (HL)=A, HL=HL+1
ldi  A,(HL)    2A           8 ---- A=(HL), HL=HL+1
ldd  (HL),A    32           8 ---- (HL)=A, HL=HL-1
ldd  A,(HL)    3A           8 ---- A=(HL), HL=HL-1

GMB 16bit-Loadcommands
----------------------
ld   rr,nn     x1 nn nn    12 ---- rr=nn (rr may be BC,DE,HL or SP)
ld   SP,HL     F9           8 ---- SP=HL
push rr        x5          16 ---- SP=SP-2  (SP)=rr   (rr may be BC,DE,HL,AF)
pop  rr        x1          12 (AF) rr=(SP)  SP=SP+2   (rr may be BC,DE,HL,AF)

GMB 8bit-Arithmetic/logical Commands
------------------------------------
add  A,r       8x           4 z0hc A=A+r
add  A,n       C6 nn        8 z0hc A=A+n
add  A,(HL)    86           8 z0hc A=A+(HL)
adc  A,r       8x           4 z0hc A=A+r+cy
adc  A,n       CE nn        8 z0hc A=A+n+cy
adc  A,(HL)    8E           8 z0hc A=A+(HL)+cy
sub  r         9x           4 z1hc A=A-r
sub  n         D6 nn        8 z1hc A=A-n
sub  (HL)      96           8 z1hc A=A-(HL)
sbc  A,r       9x           4 z1hc A=A-r-cy
sbc  A,n       DE nn        8 z1hc A=A-n-cy
sbc  A,(HL)    9E           8 z1hc A=A-(HL)-cy
and  r         Ax           4 z010 A=A & r
and  n         E6 nn        8 z010 A=A & n
and  (HL)      A6           8 z010 A=A & (HL)
xor  r         Ax           4 z000
xor  n         EE nn        8 z000
xor  (HL)      AE           8 z000
or   r         Bx           4 z000 A=A | r
or   n         F6 nn        8 z000 A=A | n
or   (HL)      B6           8 z000 A=A | (HL)
cp   r         Bx           4 z1hc compare A-r
cp   n         FE nn        8 z1hc compare A-n
cp   (HL)      BE           8 z1hc compare A-(HL)
inc  r         xx           4 z0h- r=r+1
inc  (HL)      34          12 z0h- (HL)=(HL)+1
dec  r         xx           4 z1h- r=r-1
dec  (HL)      35          12 z1h- (HL)=(HL)-1
daa            27           4 z-0x decimal adjust akku
cpl            2F           4 -11- A = A xor FF

GMB 16bit-Arithmetic/logical Commands
-------------------------------------
add  HL,rr     x9           8 -0hc HL = HL+rr     ;rr may be BC,DE,HL,SP
inc  rr        x3           8 ---- rr = rr+1      ;rr may be BC,DE,HL,SP
dec  rr        xB           8 ---- rr = rr-1      ;rr may be BC,DE,HL,SP
add  SP,dd     E8          16 00hc SP = SP +/- dd ;dd is 8bit signed number
ld   HL,SP+dd  F8          12 00hc HL = SP +/- dd ;dd is 8bit signed number

GMB Rotate- und Shift-Commands
------------------------------
rlca           07           4 000c rotate akku left
rla            17           4 000c rotate akku left through carry
rrca           0F           4 000c rotate akku right
rra            1F           4 000c rotate akku right through carry
rlc  r         CB 0x        8 z00c rotate left
rlc  (HL)      CB 06       16 z00c rotate left
rl   r         CB 1x        8 z00c rotate left through carry
rl   (HL)      CB 16       16 z00c rotate left through carry
rrc  r         CB 0x        8 z00c rotate right
rrc  (HL)      CB 0E       16 z00c rotate right
rr   r         CB 1x        8 z00c rotate right through carry
rr   (HL)      CB 1E       16 z00c rotate right through carry
sla  r         CB 2x        8 z00c shift left arithmetic (b0=0)
sla  (HL)      CB 26       16 z00c shift left arithmetic (b0=0)
swap r         CB 3x        8 z000 exchange low/hi-nibble
swap (HL)      CB 36       16 z000 exchange low/hi-nibble
sra  r         CB 2x        8 z00c shift right arithmetic (b7=b7)
sra  (HL)      CB 2E       16 z00c shift right arithmetic (b7=b7)
srl  r         CB 3x        8 z00c shift right logical (b7=0)
srl  (HL)      CB 3E       16 z00c shift right logical (b7=0)

GMB Singlebit Operation Commands
--------------------------------
bit  n,r       CB xx        8 z01- test bit n
bit  n,(HL)    CB xx       12 z01- test bit n
set  n,r       CB xx        8 ---- set bit n
set  n,(HL)    CB xx       16 ---- set bit n
res  n,r       CB xx        8 ---- reset bit n
res  n,(HL)    CB xx       16 ---- reset bit n

GMB CPU-Controlcommands
-----------------------
ccf            3F           4 -00c cy=cy xor 1
scf            37           4 -001 cy=1
nop            00           4 ---- no operation
halt           76           4 ---- repeated until interrupt occurs (low power)
stop           10 00        ? ---- similiar to halt (VERY low power sleep mode)
di             F3           4 ---- disable interrupts
ei             FB           4 ---- enable interrupts

GMB Jumpcommands
----------------
jp   nn        C3 nn nn    16 ---- PC=nn
jp   HL        E9           4 ---- PC=HL
jp   f,nn      xx nn nn 16;12 ---- jump to nn if flag set/notset (nz,z,nc,c)
jr   PC+dd     18 dd       12 ---- relative jump to nn
jr   f,PC+dd   xx dd     12;8 ---- rel.jump to nn if flag (not)set (nz,z,nc,c)
call nn        CD nn nn    24 ---- SP=SP-2, (SP)=PC, PC=nn
call f,nn      xx nn nn 24;12 ---- push PC and jump to nn, if nz,z,nc,c
ret            C9          16 ---- PC=(SP), SP=SP+2
ret  f         xx        20;8 ---- PC=(SP), SP=SP+2 if flag is.. (nz,z,nc,c)
reti           D9          16 ---- return from interrupt
rst  n         xx          16 ---- call n*8 (n=0..7)

GMB I/O-Commands
----------------
in   A,(n)     F0 nn       12 ---- read from io-port n (memory FF00+n)
out  (n),A     E0 nn       12 ---- write to io-port n (memory FF00+n)
in   A,(C)     F2           8 ---- read from io-port C (memory FF00+C)
out  (C),A     E2           8 ---- write to io-port C (memory FF00+C)

GMB Extended Syntax
-------------------
Since there are some new commands with no official names, I implemented some
different names for those commands.
HL++ may be called LDI, too.
HL-- may be called LDD, too.
RDX  may be called SWAP, too.
IN/OUT may be called LD (FF00+x), or LDH (x) too.

:Copyright/Contact/Updates
--------------------------
A22i is free for non-commercial use. Commercial users or distributors
please contact me and ask for a fair deal. Bug reports, comments and
shareware-like $$$ are welcome.
My email address is top-secret, sorry. (I have had some troubles with
rather dumb questions from thousands of no$gmb users).
Letters to Martin Korth, Ringheide 44, 21149 Hamburg, Germany
(Not for no$gmb and/or gaming related questions - I won't reply)
Updates and other nocash projects at http://www.work.de/nocash/

NOCA$H PROJECTX CHECKLIST                         YES   SHAME ON ME
Did I download no$cpc (speedy cpc emulator) ?     [ ]       [ ]
Did I download no$gmb (speedy gameboy emulator) ? [ ]       [ ]
Did I download no$msx (speedy msx emulator) ?     [ ]       [ ]
Did I download the gameboy infocom interpreter ?  [ ]       [ ]
Did I download ibm / gameboy hardware docs ?      [ ]       [ ]
Did I download any other nocash projects ?        [ ]       [ ]
